process variation造句
例句與造句
- In this paper , we study the clock tree optimization for the tolerance of process variation
在本篇論文中，我們研究有關(guān)于制程變異容忍度的時鐘樹最佳化方法。 - Due to the concern of process variation , the delay of each clock buffer is treated as a range instead of a single value
在制程變異上面，每個時鐘緩沖器的延遲值被表示為一個范圍值。 - However , in fact , zero skew or minimal skew approaches may be sensitive to process variations
然而，事實上，零時序差異或者是最小時序差異演算法所得到的時鐘樹，其時序?qū)χ瞥套儺惙浅Ｃ舾小? - Our optimization goal is not only to maximize the tolerance of the circuit to process variation , but also to minimize the total area of clock buffers
我們最佳化的目的，不僅是要最大化制程變異容忍度，并且要最小化整個電路時鐘緩沖器的總面積。 - As manufacturing technology shrinks to the deep submicron process , the tolerance of process variation becomes an important subject in the clock tree design
摘要隨著制程技術(shù)縮小至深次微米，制程變異容忍度在時鐘樹設(shè)計上已成為一個重要的課題。 - It's difficult to find process variation in a sentence. 用process variation造句挺難的
- And then the optimization strategies of parameter design and surface methodology have been analysed from two respects of minimizing process bias and minimizing process variation , simultaneously other four kinds of optimization strategies resolving the compromise between these two objectives have been studied
然后，從過程偏差最小化和過程方差最小化這兩個角度分析了參數(shù)設(shè)計和曲面法的優(yōu)化策略，以及-解決這兩者沖突問題的其他四種優(yōu)化策略。 - In recent years , oversampling techniques based on sigma - delta modulation are widely used to implement the interfaces between analog and digital signals in vlsi systems . this kind of technique can offer numerous advantages for the realization of high - resolution analog - to - digital converters ( adcs ) , and be insensitive to process variations . in other ways , the architecture is power - efficient means of implementing adcs
近年來,基于sigma - delta調(diào)制器的過采樣技術(shù)被廣泛的應(yīng)用于模擬和數(shù)字接口電路,這種技術(shù)對實現(xiàn)高精度模數(shù)轉(zhuǎn)換器有較多優(yōu)勢,同時可以降低系統(tǒng)功耗,但對工藝要求不是很苛刻,而且采用合適的低電壓,以保證電路在低電壓下可靠的工作。 - In the fifth chapter , the performance of transconductor - capacitor ( gm - c ) continuous time filter is discussed . due to process variation and parasitics , an automatic tuning is designed for center frequency and quality factor q . also , in this chapter , a two order bandpass filter with tunable is designed . the effects on filter ' s performance of the non - idealities of a cmos ota are studied and the computer simulations at the mos transistor level are carried out
第五章討論了跨導(dǎo)電容連續(xù)時間濾波器的性能特點，設(shè)計了一個中心頻率可調(diào)的二階帶通濾波器，為了使濾波器參數(shù)自動調(diào)整到設(shè)計標(biāo)準(zhǔn)值，從而保持其設(shè)計值的實現(xiàn)精度，論文給出了片內(nèi)自校正(可調(diào)諧)環(huán)節(jié)。 - Also discussed the methods on how to realize the cwt both in time - domain and frequency - domain and how to design the gm - c bandpass filter used in realization of cwt . in order to optimize the performance of gm - c filter , linearization techniques are investigated and proposed . due to process variation and parasitics , an automatic tuning is designed for center frequency / 0 and quality factor q also , in this thesis , 16 - channel analogue cmos cwt circuit has been realized
論文圍繞連續(xù)小波變換的模擬電路實現(xiàn)這一熱點問題，討論了連續(xù)小波變換的時域和頻域?qū)崿F(xiàn)方法；具體分析了并行結(jié)構(gòu)與串行結(jié)構(gòu)的優(yōu)缺點；研究了頻域法中的跨導(dǎo)-電容帶通濾波器的設(shè)計；給出了改善跨導(dǎo)輸入級傳輸特性的線性程度并擴大線性范圍的具體方法；設(shè)計了片內(nèi)自校正(可調(diào)諧)環(huán)節(jié)使濾波器參數(shù)自動調(diào)整到設(shè)計標(biāo)準(zhǔn)值；最后給出了16通道濾波器組實現(xiàn)小波變換的方法。